Texas Instruments /TM4C123GE6PM /SYSCTL /DSLPCLKCFG

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Interpret as DSLPCLKCFG

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SYSCTL_DSLPCLKCFG_O_IGN)SYSCTL_DSLPCLKCFG_O 0SYSCTL_DSLPCLKCFG_D

SYSCTL_DSLPCLKCFG_O=SYSCTL_DSLPCLKCFG_O_IGN

Description

Deep Sleep Clock Configuration

Fields

SYSCTL_DSLPCLKCFG_O

Clock Source

0 (SYSCTL_DSLPCLKCFG_O_IGN): MOSC

1 (SYSCTL_DSLPCLKCFG_O_IO): PIOSC

3 (SYSCTL_DSLPCLKCFG_O_30): 30 kHz

7 (SYSCTL_DSLPCLKCFG_O_32): 32.768 kHz

SYSCTL_DSLPCLKCFG_D

Divider Field Override

Links

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